#ifndef __CLK_SUN8IW8_H
#define __CLK_SUN8IW8_H
 
 
#define LOSC_CLK "losc"
#define HOSC_CLK "hosc"
#define PLL_AUDIOX8_CLK "pll_audiox8"
#define PLL_AUDIOX4_CLK "pll_audiox4"
#define PLL_AUDIOX2_CLK "pll_audiox2"
#define PLL_VIDEOX2_CLK "pll_videox2"
#define PLL_PERIPH0X2_CLK "pll_periph0x2"
#define HOSCD2_CLK "hoscd2"
#define PLL_CPU_CLK "pll_cpu"
#define PLL_AUDIO_CLK "pll_audio"
#define PLL_VIDEO_CLK "pll_video"
#define PLL_VE_CLK "pll_ve"
#define PLL_DDR0_CLK "pll_ddr0"
#define PLL_PERIPH0_CLK "pll_periph0"
#define PLL_ISP_CLK "pll_isp"
#define PLL_PERIPH1_CLK "pll_periph1"
#define PLL_DDR1_CLK "pll_ddr1"
#define CPU_CLK "cpu"
#define AXI_CLK "axi"
#define PLL_PERIPHAHB0_CLK "pll_periphahb0"
#define AHB0_CLK "ahb0"
#define APB0_CLK "apb0"
#define APB1_CLK "apb1"
#define SDMMC0_CLK "sdmmc0"
#define SDMMC1_CLK "sdmmc1"
#define SDMMC2MOD_CLK "sdmmc2mod"
#define SDMMC2_CLK "sdmmc2"
#define SS_CLK "ss"
#define SPI0_CLK "spi0"
#define I2S0_CLK "i2s0"
#define USBOHCI_CLK "usbohci"
#define USBEHCI_CLK "usbehci"
#define USBOTG_CLK "usbotg"
#define USBPHY0_CLK "usbphy0"
#define DE_CLK "de"
#define TCON_CLK "tcon"
#define CSI0_S_CLK "csi0_s"
#define CSI0_M_CLK "csi0_m"
#define CSI1_S_CLK "csi1_s"
#define CSI1_M_CLK "csi1_m"
#define VE_CLK "ve"
#define LVDS_CLK "lvds"
#define ADDA_CLK "adda"
#define AVS_CLK "avs"
#define MBUS_CLK "mbus"
#define MIPICSI_CLK "mipicsi"
#define GMAC_CLK "gmac"
#define EPHY_CLK "ephy"
#define DMA_CLK "dma"
#define PIO_CLK "pio"
#define TWI0_CLK "twi0"
#define TWI1_CLK "twi1"
#define UART0_CLK "uart0"
#define UART1_CLK "uart1"
#define UART2_CLK "uart2"

 
#endif
